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Quantum dots confinement

Quantum dots
Quantum dots have structures in which charge carriers have zero degrees of freedom with unique properties. The density of states of an ideal quantum dot consists of entirely quantized energy states, quite unlike bulk material, where energy bands exist. The carrier confinement has an effect on the quantum dot structure and the relationship between the size of the dot and the change in its energy levels can be found by using the eigenenergies of the Schrödinger wave equation. Thus, when the motion of charge carriers in a semiconductor is limited to below approximately 100 nanometers in one or more dimensions, quantum size effects can be observed within the structure.
Low dimensional structures
Quantum wells confine electrons in one dimension while quantum wires and dots limit carriers in two and three dimensions, respectively. These devices are also commonly called low dimensional quantum structures. Likewise 2D, 1D and 0D structures refer to quantum wells, wires and dots as carrier confinement increases to all three dimensions. The optical, electrical and physical characteristics of such low-dimensional quantum structures can be modified by varying the carrier confinement, material doping, etc. Also by controlling the density of states, the absorption characteristics of photo detectors with quantum size dimensions can be modified.
Fabrication methods
Today there are several different ways to create quantum dot structures. The most popular techniques for the fabrication of quantum dots are etching.
Quantum dots can be realized by etching various epitaxially grown quantum well semiconductors, by removing the material around nanoscale masks. A thin polymer resist film is spun onto the sample and exposed using a high-resolution lithography method such as electron beam lithography. A metal or other composition mask layer is then deposited using evaporation and lift off techniques. Finally, the unmasked semiconductor material is removed by chemical etching, creating the quantum dots within slim pillar features. Using this method, the motion of electrons, initially restricted to a quantum well ‘plane’, is restricted within the pillar with a diameter around 10-100 nm.
Researchers of Texas Instrument Central Research Labs have created square quantum dots in GaAs/AlGaAs material etched using lithography and reactive ion etching. The etched quantum dots had resonant tunneling.
Colloidal gold particles patterned by e-beam have been used as a nanopillar etch mask, ECR etching has been used to form Si nanopillars, electron beam lithography and reactive ion etching have also been used to form silicon nanopillars, anodic aluminum oxide templates has been used to form a semi-periodic array of nanopillars and electron beam lithography and dry etching techniques have been used to create of nanopillars in various III-V materials.
Self-organized growth
Probably the most common quantum dot fabrication technique today is the self-assembled growth method, in which random islands of material such as InGaAs are grown on GaAs matrix material. Self-organized quantum dot growth has several advantages, which include a convenient growth process without the need for precise lithography to define etch or growth masks, but with a lack of fine placement control as well as the rather inhomogeneous distribution of quantum dot size.
Vapor-liquid-solid technique
This is an old technique to form semiconductor whiskers or nanowires. This method involves proper control of the sample surface and seed layer, growth chamber pressure, temperature and gas flow. Typically, metals such as gold are deposited on the sample surface by evaporation. The metal masks can be patterned with e-beam lithography, for instance, or can be randomly distributed by heating within the growth chamber. These nanometer-sized metal dots act as a catalyst for Ge, III-V and II-VI semiconductor materials. By controlling the growth condition, three-dimensional material formation can occur, developing nanopillars under each seed dot.
This fabrication technique is called nano imprint lithography and combines high-throughput with nanometer scale critical dimensions. For example using electron beam lithography and dry etching, silicon dioxide can be patterned to form the imprint mold on a silicon wafer. PMMA is then spun on another silicon substrate and heated above its glass transition temperature. The two substrates are pressed together at high pressures and the PMMA substrate temperature is lowered below the glass transition temperature. Finally, the mold is removed and the PMMA surface is cleaned using O2 plasma to ensure proper removal of unwanted polymer.
Laser-assisted nanoimprint lithography (LAN) can also be used to form imprint molds more quickly. In this method various polymer films are spun onto a quartz substrate; a XeCl excimer laser melts these polymers quickly and later the pattern is transferred to the quartz via dry etching.The advantage of the stamping technique is that it is a pseudo-parallel fabrication process in which a single mold can be used to imprint several polymer-coated samples without cleaning.

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